Synopsys Joins RISC-V, Reveals Trio of Embedded Core Designs set for 2024 Launch

Synopsys expands its ARC portfolio with 32-bit and 64-bit ARC-V options, and prepares to join the RISC-V International board, in response to growing interest and adoption of the open-standard RISC-V instruction set among its customers.

• Synopsys plans to expand its ARC portfolio with the introduction of 32-bit and 64-bit ARC-V options based on the RISC-V open instruction set architecture. This move is mainly because of the growing adoption of the RISC-V open standard and the increased interest from clientele.
• The three new processor designs include ARC-V RMX, a 32-bit ultra-low power embedded core, ARC-V RHX, a 32-bit core optimized for real-time performance, and ARC-V RPX, a 64-bit multi-core processor optimized for host applications, generally running on Linux.
• These new embedded core designs are intended for a range of applications. The RMX family is aimed at low-power Internet of Things (IoT) applications, the RHX family is for high-performance real-time processors for infotainment and consumer enterprise SSDs, and the RPX family is for higher performance applications like automotive controllers or data center hardware.
• Synopsys plans to join the board and Technical Steering Committee of RISC-V International, the non-profit entity that maintains the RISC-V specifications. This shows Synopsys's commitment to the growing adoption of RISC-V and developing open standards.
• The 32-bit ARC-V RMX embedded processor IP will be available in Q2 of 2024, while the 32-bit ARC-V RHX real-time design and 64-bit ARC-V RPX host processor will be available in the second half of 2024. Additional family members will be added over the year.

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