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Samsung Proposes Moving Memory Controller Into HBM and Exploring 'aHBM' Memory‑Plus‑Compute

The idea aims to free processor die area so chipmakers can add more compute transistors to address rising bandwidth and packaging limits from larger AI models.

Overview

  • Samsung presented research proposing that the memory controller be relocated from the processor SoC into the HBM base die and that HBM evolve to include compute, a concept it calls aHBM.
  • Company engineers said the memory controller currently consumes about 5–10% of SoC die area, and moving it could free silicon real estate for more on-chip compute transistors.
  • aHBM would convert HBM from a passive high-speed buffer into an active memory-plus-compute element that could handle some AI workloads at or near the memory stack.
  • Samsung framed these ideas as ongoing R&D presented at a technical conference rather than as announced products, with no timelines or deployment plans given.
  • HBM base dies are already made on advanced logic processes, which Samsung cited as the technical reason this shift is possible and as a pathway to new packaging and chiplet trade-offs for AI hardware.