Overview

• PCI-SIG officially disclosed the PCIe 8.0 specification on August 5, 2025, defining a raw bit rate of 256 GT/s per lane and up to 1 TB/s bidirectional throughput over a x16 configuration.
• The new standard preserves full backward compatibility with earlier PCIe generations to ensure seamless integration with existing devices.
• Dedicated workgroups will evaluate new connector designs and validate latency, forward error correction and reliability targets before finalizing the specification.
• By continuing the tradition of doubling bandwidth every three years, PCIe 8.0 builds on PCIe 7.0’s framework to meet surging I/O demands.
• Engineered for AI, machine learning, high-speed networking and edge and quantum computing, the specification targets a member release in 2028 for data-intensive markets.