Overview
- At Hot Chips on Monday, Intel publicly detailed Diamond Rapids, Crescent Island and Wildcat Lake and explained how each links to Intel 18A, Foveros Direct 3D packaging and early UCIe interconnect use.
- Diamond Rapids is a next‑generation Xeon family built for enterprise orchestration with up to 256 P‑cores, about 1.28 GB of last‑level cache, a centralized fabric hub design using UCIe‑S, and new ISA/acceleration support such as AVX 10.2 and APX for AI workloads.
- Crescent Island is an inference‑first GPU based on the Xe3P architecture that packs 32 Xe cores, expanded XMX matrix engines, large on‑chip caches and up to 480 GB of LPDDR5X to enable higher token capacity in 350W air‑cooled cards with customer sampling targeted for the second half of 2026.
- Wildcat Lake is a client/edge SoC in the Core Series 3 lineup that combines new CPU cores, integrated Xe3 graphics with XMX, and a neural processing unit rated up to 17 TOPS, and it represents Intel’s first in‑processor use of UCIe for package-level chiplet designs.
- Intel’s stack signals a push toward heterogeneous, chiplet‑based systems that trade peak HBM bandwidth for lower cost and power in many inference cases, but near‑term questions remain about sampling timing, partner adoption, and how these parts will compete with HBM‑backed accelerators from rivals.