Overview
- CXMT announced on Sunday that its fifth‑generation DRAM platform has entered mass production and that two 24‑Gbit LPDDR5X products built on the platform are already being produced at scale.
- The company said it used quadruple patterning to reduce the active‑area half‑pitch to about 11.95 nanometres, a change it says lets more memory fit on each chip and increases gross dies per wafer.
- CXMT claims the G5 platform yields at least 50% more gross chip dies per wafer than its previous generation and offers the 24‑Gbit LPDDR5X in two package formats for different device designs.
- Analysts and the company note that gross dies per wafer measures potential output before testing, so the wider commercial impact depends on final pass yields, large‑scale customer qualification and the ability to scale manufacturing without advanced foreign tools.
- The move advances Beijing’s drive for domestic memory capacity and could ease supply for Chinese smartphones and servers, but global DRAM leaders Samsung, SK Hynix and Micron still dominate production and market share.