Overview
- CXMT announced over the weekend that it is preparing to ship DDR5 RDIMM server modules using a 4F² DRAM cell layout before the end of 2026.
- The 4F² layout reduces the area per memory cell from the common 6F² to four times the square of minimum feature size, which CXMT says can raise density about 30%–50%.
- CXMT attributes its approach to an in‑house Vertical Surrounding Gate (VSG) transistor and points to more than 300 related patent families it has published.
- The announcement triggered a sharp selloff in memory and semiconductor stocks, with major firms including Samsung, SK Hynix and Micron recording multi‑percent declines.
- Independent verification, production yields and access to advanced manufacturing tools restricted by U.S. export controls remain key uncertainties for large‑scale, high‑volume rollout.