Overview
- CXMT announced on Sunday that its fifth‑generation (G5) DRAM platform is in mass production and that two 24‑gigabit LPDDR5X products built on G5 are already being made at scale.
- The G5 process uses quadruple patterning to shrink the active half‑pitch to about 11.95 nanometres and the company says this change yields at least 50% more gross dies per wafer compared with its prior generation.
- Gross dies per wafer measures potential chips per wafer before defective units are removed, so the company’s claim does not itself prove high final pass yields or large qualified customer shipments.
- Industry and company reports say CXMT has rapidly expanded 12‑inch fab output, completed a Shanghai STAR Market listing in mid‑2026, and has begun supplying mobile devices, though some capacity and contract figures come from company disclosures rather than independent verification.
- Key next steps to watch are customer qualification and yield improvement, the commercial roll‑out of LPDDR6 and HBM3E which are at early test or pilot stages, and whether lower costs from G5 push larger rivals to respond on mobile memory supply chains.