Overview
- A joint set of announcements this week confirmed that Samsung will deploy High‑NA EUV for DRAM by 2028 and TSMC plans High‑NA for advanced‑node high‑volume manufacturing from 2030, joining Intel which already uses the systems in production.
- Intel says it has processed more than one million wafers with High‑NA across testing and some volume layers for its Panther Lake processors, providing early proof that the machines can run in manufacturing.
- ASML and partners proposed moving photomasks from the long‑standing 6‑inch standard to a 12‑inch format, targeting a 12‑inch pilot line by 2031 and readiness for high‑volume production by 2033 to eliminate stitching limits and raise productivity by about 40 percent.
- The technology will be costly and complex to scale because each High‑NA tool costs roughly $350–$400 million and the mask change needs coordinated upgrades to mask makers, inspection tools and optics suppliers; ASML plans near‑term capacity increases and roughly 30 percent annual tool output growth in 2027–28.
- Analysts say the commitments improve visibility on High‑NA adoption but warn broad commercial payoff will take years as fabs run pilot lines, place orders and upgrade the mask ecosystem, with the changes poised to shape supply of AI accelerators and memory over the coming decade.