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ASML and TSMC Launch Drive to Move Chip Masks to 12‑Inch for High‑NA EUV

The plan aims to raise scanner productivity and cut stitching limits to help makers build larger, denser AI and memory chips while the industry upgrades the mask and inspection ecosystem.

Overview

  • ASML and TSMC announced the joint initiative on Tuesday to shift from 6‑inch to 12‑inch photomasks, with a 12‑inch pilot line targeted for 2031 and production readiness by 2033.
  • TSMC will start using ASML’s High‑NA EUV tools in high‑volume advanced‑node production in 2030, Samsung committed to High‑NA DRAM mass production by 2028, and Intel already runs High‑NA on select layers in production today.
  • High‑NA EUV raises optical resolution by increasing the numerical aperture, which lets a scanner print finer features in a single exposure but halves the exposure field on 6‑inch masks, creating stitching limits that 12‑inch masks would remove.
  • Each High‑NA system costs roughly $350–$400 million and ASML is the sole commercial supplier, so machine orders, delivery schedules and ASML’s planned capacity increases are central to whether the roadmap can be funded and timed.
  • The transition requires multi‑year upgrades across mask blanks, writers, pellicles, defect inspection, EDA and factory automation, so adoption depends on ecosystem investment, supplier readiness and successful pilot validation.