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AMD Confirms EPYC Venice Processors as First HPC Chips on TSMC's 2nm Technology

The Zen 6-based CPUs have passed key functional tests, marking a major milestone in AMD's high-performance computing roadmap and U.S. production efforts.

Overview

  • AMD's next-generation EPYC Venice processors, built on the Zen 6 architecture, are the first high-performance computing products to utilize TSMC's advanced 2nm (N2) process technology.
  • The EPYC Venice CPUs have successfully completed critical functional testing, showcasing readiness for their planned launch next year.
  • TSMC's N2 process incorporates cutting-edge NanoSheet technology and gate-all-around transistors, delivering significant gains in power efficiency, performance, and transistor density.
  • AMD has also validated its 5th Gen EPYC CPUs at TSMC's Arizona Fab 21, emphasizing a strategic shift toward U.S.-based semiconductor production.
  • The longstanding collaboration between AMD and TSMC continues to drive innovation, solidifying their leadership in the high-performance computing sector.

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