Overview
- AMD's next-generation EPYC Venice processors, built on the Zen 6 architecture, are the first high-performance computing products to utilize TSMC's advanced 2nm (N2) process technology.
- The EPYC Venice CPUs have successfully completed critical functional testing, showcasing readiness for their planned launch next year.
- TSMC's N2 process incorporates cutting-edge NanoSheet technology and gate-all-around transistors, delivering significant gains in power efficiency, performance, and transistor density.
- AMD has also validated its 5th Gen EPYC CPUs at TSMC's Arizona Fab 21, emphasizing a strategic shift toward U.S.-based semiconductor production.
- The longstanding collaboration between AMD and TSMC continues to drive innovation, solidifying their leadership in the high-performance computing sector.